An FPGA based 3D HW Accelerator


During my studies at TUHH I found this seminar about system on a chip. At that point in time I thought that studying general engineering science, then specialize in electrical engineering and to finally end up in computer science was a good idea. I was wrong, but the seminar itself was plenty of fun even though my VHDL programming skills were far behind Tim Bösckes, the guy that I did this project with. And just in case you were wondering, yes those are only 8-bits of color.

So the TU gave us this crappy XSV evaluation board from Xess and we wanted to implement a decent 3D renderer on it. The idea was to use a small MIPS CPU and connect it to a Rasterizer to draw the triangles. There also were some other components that you always need to do anything with the real-world such as a serial port, a VGA connection and 2 buttons.

My task was the serial port connection. Which might sound trivial, but we found a nasty bug which corrupted our incoming data and kept me busy for some weeks. I also worked on the GCC tool chain wich did produce code that contained NOPs which we did not need. So I had to customize the tool chain. Even though I have to admit that most credit belongs to Tim, I still enjoyed doing this project. And I learned a lot from him. Luckily the way-back machine preserved the final report.